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Micrologic's Products
nanoRV™ is a nanometer range EDA tool that interactively eliminates reliability issues during the construction of integrated circuit’s physical design. The tool automatically checks for all reliability phenomenon including but not limited to electromigration, self heat and voltage drop (IR Drop) during the construction of IC layout, creating a Reliability-Aware mask design environment. This tool works as a plug-n within Cadence’s layout editor Virtuoso platform.
nanoDRC™ identifies and corrects design rule violations. Plug nanoDRC into Cadence Virtuoso and you’ll have a design rule aware IC layout design environment. Automatically analyze the IC layout block database in real-time to identify and correct design rule violations before signoff validation.
nanoLVS™ - New, innovative EDA software which is based on recent real-time technology. This program is a plug-in into Cadence’s Virtuoso platform, enabling the interactive LVS (Layout versus Schematic) correction environment. The program reads a circuit netlist and the results of LVS check (From the Industry’s standard LVS checkers) and automatically corrects LVS mismatches. Our system provides a powerful tool that will eliminate LVS issues during the integrated circuit physical design phase.
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