nanoRV™ is a nanometer range EDA tool that interactively eliminates reliability issues during the construction of an integrated circuit’s physical design. The tool automatically analyzes for reliability phenomenon, including but not limited to electromigration, self heat and voltage drop (IR Drop) during the construction of IC layout, creating a Reliability-Aware mask design environment.

nanoRV™ is aimed for rapid, accurate, and efficient reliability verification and correction during the construction of a layout with ease. nanoRV™ reads the layout technology file which includes reliability constraints and rules. It then performs an on-the-fly analysis of the constructed layout and advises about existing EM, SH and IR Drop issues. nanoRV™ has the capability to automatically correct these reliability issues, maintaining the process’s design rule accuracy.

The tool works in flat or Hierarchical mode. In flat mode our tool detects violations only at the current edited level. In hierarchical mode our tool checks for reliability issues through all block levels. The main advantage of this concept is the creation of a Reliability-Aware IC layout design environment that eliminates ahead of time reliability issues that may consume significant time later in the design flow.

The system offers full nanometer support, including deep nanometer ranges.

nanoRV™ supports digital, analog and mixed signal designs.

 In order to ensure versatility, our tool fully supports OpenAccess enabling interaction with the industry’s standard scripting languages, providing full customization possibilities.