Micrologic Design Automation

· PRODUCTS

nanoRVInteractive™

Reliability-Aware Design Environment

nanoRVInteractive™ is a nanometer range EDA tool that interactively eliminates reliability issues during the construction of integrated circuit’s physical design. The tool automatically checks for all reliability phenomenons including but not limited to electromigration, self heat and voltage drop (IR Drop) during the construction of IC layout, creating a Reliability-Aware mask design environment. This tool works as a plug-n within Cadence’s layout editor Virtuoso platform.

nanoRVInteractive™ is aimed for rapid, accurate, and efficient reliability verification and correction during the construction of a mask layout database, and to accomplish this with ease. nanoRVInteractive reads the layout editor’s technology file which includes reliability constraints and rules. It then performs an on-the-fly analysis of the constructed layout and advises about existing EM, SH and IR Drop issues. nanoRVInteractive has the capability to automatically correct these reliability issues, maintaining the process’s design rule accuracy.

nanoRVInteractive offers an advanced viewing system that provides an accurate graphical representation of the reliability issues within the design environment including a secured recovery mechanism to keep the block’s reliability information safe in the event of system crash or malfunction.

In order to ensure versatility, the tool fully supports OpenAccess enabling interaction with industry’s standard scripting languages, providing full customization possibilities.

During the construction of a mask layout block, nanoRVInteractive reads the built-in layout editor’s database, processes it and generates violation markers with full detailed reports about each violation.

nanoRVInteractive works in flat and/or Hierarchical mode. In flat mode the tool detects violations only at the current edited level. In hierarchical mode the tool checks for reliability issues through all block levels. The main advantage of this concept is the creation of a Reliability-Aware IC layout design environment that eliminates ‘ahead-of-time’ reliability issues that may consume significant time later in the design flow.

nanoRVInteractive™ Page

nanoRVInteractive™ Datasheet

VisuaLVS™

Interactive Layout vs. Schematic Correction system

VisuaLVS™ - is our newest productivity tool that automatically corrects connectivity mismatches in an integrated circuit layout block. The software which is based on recent real-time technology is a plug-in into Cadence’s Virtuoso platform, enabling the interactive LVS (Layout versus Schematic) correction environment. The program reads a circuit netlist and the results of a LVS check (From the Industry’s standard LVS checkers) and automatically corrects LVS mismatches.

VisuaLVS™ - Assist Mode - The system can be set to work in Assist Mode allowing the user to work in a non-invasive manner detecting LVS problems during the construction of a mask layout block and recommending alternative connectivity options in order to correct the mismatch.

VisuaLVS™ - Auto Correct Mode – This mode provides automatic correction of LVS violations in a layout block. The tool reads the LVS check results and the block’s netlist and automatically corrects all LVS violations, maintaining the process design rule accuracy.

VisuaLVS™ - Full nanometer support, including deep nanometer ranges.

VisuaLVS™ works in flat or Hierarchical mode.

VisuaLVS™ is an interactive nanometer productivity tool that is part of NanoToolBox™ (NTB) tools suite and can easily exchange information with all of our other interactive NanoToolBox™ tools.

VisuaLVS™ is fully supporting OpenAccess for future interoperability and enhancements.

VisuaLVS™ Page

VisuaLVS™ Datasheet

* Virtuoso is a trademark of Cadence Corporation.