nanoLVS™ is a nanometer range EDA tool that corrects connectivity mismatches in an integrated circuit layout block. The tool reads the IC layout block’s and its netlist and automatically corrects connectivity mismatches, maintaining the process design rule correctness. In addition, nanoLVS™ provides a real-time LVS correction environment within layout editors.

The tool is aimed for rapid, accurate, and efficient automatic correction of connectivity mismatches in a mask layout database. nanoLVS™ reads the layout block’s netlist, comparing the information with the block’s physical layout. In the instance of connectivity mismatches, the tool suggests correct alternative connections. Upon user’s approval nanoLVS™ disconnects existing nodes and replaces them with the new connections, maintaining the process design rule correctness.

The system supports OpenAccess for future interoperability and enhancements.

In order to ensure versatility, our tool fully supports OpenAccess enabling interaction with industry’s standard scripting languages, providing full customization possibilities.

Full nanometer support, including deep nanometer ranges.

Universal & Fully Customizable. Users can customize and personalize their options

Supports digital. Analog and mixed signal designs.